주요 메뉴 바로가기 보조 메뉴 바로가기 본문 바로가기
RESEARCH COMMUNICATION PORTAL

논문 해외 국제전문학술지(SCI급) Low-power, low-cost CMOS direct-conversion receiver front-end for multistandard applications

  • 학술지 구분 국제전문학술지(SCI급)
  • 게재년월 2013
  • 저자명 J Kim, J Silva-Martinez
  • 학술지명 IEEE Journal of solid-state circuits
  • 발행처명 IEEE XPLORE
  • 발행국가 해외
  • 논문언어 외국어

논문 초록 (Abstract)

A broadband CMOS direct-conversion receiver with on-chip frequency divider has been integrated in a 0.13- μm CMOS process. The key feature of the proposed receiver front-end is a single low-noise transconductance amplifier (LNTA) driving a current-mode passive mixer terminated by a low-input-impedance transimpedance amplifier (TIA). The receiver chain has improved robustness to out-of-band interference and outstanding linearity. We employ a broadband common-gate (CG) LNTA with dual feedback to improve both gain and noise figure (NF) without breaking the fixed relationship between input impedance, transconductance gain, and load impedance. A LNTA load impedance boosting technique suppresses noise-amplification due to TIA, commonly found in passive mixers. The core circuit (RF and baseband signal path) consumes only 13 mW, and the prototype receiver achieves >22.4-dB conversion gain, dB NF, and ≥ -1.5 dBm IIP3 from 1.4 to 5.2 GHz. Maximum conversion gain of 24.3 dB and minimum NF of 6.5 dB are achieved at 1.4 and 2 GHz, respectively. The chip active area is 1.1 mm 2 with the entire RF signal path operated from a 1.2-V supply. The LO portion is biased from a 1.5-V supply.