논문 해외 국제전문학술지(SCI급) Joule Heating to Enhance the Performance of a Gate-All-Around Silicon Nanowire Transisto
- 학술지 구분 국제전문학술지(SCI급)
- 게재년월 2016-04
- 저자명 Chang-Hoon Jeon, Jun-Young Park, Myeong-Lok Seol, Dong-Il Moon, Jae Hur, Hagyoul Bae, Seung-Bae Jeon, and Yang-Kyu Choi
- 학술지명 IEEE Transactions on Electron Devices
- 발행처명 IEEE XPLORE
- 발행국가 해외
- 논문언어 외국어
홈페이지논문 초록 (Abstract)
Thermal engineering assisted by electrical annealing was applied to enhance the device performance of a gate-all-around (GAA) silicon nanowire (Si-NW) transistor. The ON-state current is increased by four times. Joule heating was produced in a Si-NW by electrical biasing. The heating was concentrated on both edges of the gate, which served as a heat sink, effectively lowering the parasitic external resistance of the GAA Si-NW transistor. The electrical biasing gives rise to a thermal annealing effect on a selected device and to all devices connected by a common biasing electrode. The evidence reported in our previous work regarding current-induced oxidation by Joule heating in a Si-NW was also observed in the measured transfer characteristics of the GAA Si-NW transistor in this paper.