논문 해외 국제전문학술지(SCI급) Comprehensive Analysis of Gate-Induced Drain Leakage in Vertically Stacked Nanowire FETs: Inversion-mode vs. Junctionless-mode
- 학술지 구분 국제전문학술지(SCI급)
- 게재년월 2016-05
- 저자명 Jae Hur, Byung-Hyun Lee, Min-Ho Kang, Dae-Chul Ahn, Tewook Bang, Seung-Bae Jeon, and Yang-Kyu Choi
- 학술지명 IEEE Electron Device Lettes
- 발행처명 IEEE XPLORE
- 발행국가 해외
- 논문언어 외국어
홈페이지논문 초록 (Abstract)
A comprehensive analysis of the gate-induced drain leakage (GIDL) current of vertically stacked nanowire (VS-NW) FETs was carried out. In particular, two different operational modes of the VS-NW, an inversion mode (IM) and a junctionless mode (JM), were compared. The GIDL current of the JM-FET was considerably smaller than that of the IM-FET, and the reason for the difference was consequently determined by numerical simulations. It was found that the source of the difference between the IM-FET and JM-FET was the difference in source/drain (S/D) doping concentration, where the depletion width becomes the tunneling width, considering a long extension length at the S/D regions. The experimental results showed that the GIDL current of the NW FET was significantly controlled by longitudinal band-to-band tunneling (BTBT), rather than the transverse BTBT, as had been reported in the previous literature.