논문 해외 국제전문학술지(SCI급) A QUASI-DOHERTY SOI CMOS POWER AMPLIFIER WITH FOLDED COMBINING TRANSFORMER
- 학술지 구분 국제전문학술지(SCI급)
- 게재년월 2016-08
- 저자명 이동호
- 학술지명 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
- 발행처명 IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- 발행국가 해외
- 논문언어 외국어
- 전체저자수 3
홈페이지논문 초록 (Abstract)
A fully integrated transformer-based quasi-Doherty power amplifier (DPA) with an adaptive power divider (APD) is presented in this pa per. A novel folded combining transformer is designed for power combini ng, which has smaller insertion loss than a conventional one. An APD adaptively controls the power delivered to carrier and peaking amplifiers by altering the input impedance of the peaking ampl ifier, which has a variable resonance frequency that changes accordin g to the input power. Most of the power is delivered to the carrier amp lifier at low incoming power, and it is divided between the carrier and the peaking amplifiers at high incoming power. With continuous wa ve signal at 1850 MHz, the quasi-DPA implemented with an SOI CMOS proce ss achieves 39.8% and 44.4% power-added efficiencies (PAEs) at t he first and the second peak, respectively. With wideband code divisio n multiple access signal, it has 29.2-dBm average linear output power an d a 40.47% PAE with a -33-dBc adjacent channel leakage ratio 1. With lon g-term evolution (LTE) signal, it delivers 27.2-dBm average linear o utput power and a 37.7% PAE, satisfying linearity requirements for the LTE.